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 Freescale Semiconductor Technical Data
Document Number: MRF1513N Rev. 11, 6/2008
RF Power Field Effect Transistor
N - Channel Enhancement - Mode Lateral MOSFET
Designed for broadband commercial and industrial applications with frequencies to 520 MHz. The high gain and broadband performance of this device make it ideal for large - signal, common source amplifier applications in 7.5 volt portable and 12.5 volt mobile FM equipment. D * Specified Performance @ 520 MHz, 12.5 Volts Output Power -- 3 Watts Power Gain -- 15 dB Efficiency -- 65% * Capable of Handling 20:1 VSWR, @ 15.5 Vdc, 520 MHz, 2 dB Overdrive Features * Excellent Thermal Stability G * Characterized with Series Equivalent Large - Signal Impedance Parameters * N Suffix Indicates Lead - Free Terminations. RoHS Compliant. S * In Tape and Reel. T1 Suffix = 1,000 Units per 12 mm, 7 Inch Reel.
MRF1513NT1
520 MHz, 3 W, 12.5 V LATERAL N - CHANNEL BROADBAND RF POWER MOSFET
CASE 466 - 03, STYLE 1 PLD - 1.5 PLASTIC
Table 1. Maximum Ratings
Rating Drain- Source Voltage Gate- Source Voltage Drain Current -- Continuous Total Device Dissipation @ TC = 25C Derate above 25C Storage Temperature Range Operating Junction Temperature
(1)
Symbol VDSS VGS ID PD Tstg TJ
Value - 0.5, +40 20 2 31.25 0.25 - 65 to +150 150
Unit Vdc Vdc Adc W W/C C C
Table 2. Thermal Characteristics
Characteristic Thermal Resistance, Junction to Case Symbol RJC Value (2) 4 Unit C/W
Table 3. Moisture Sensitivity Level
Test Methodology Per JESD 22 - A113, IPC/JEDEC J - STD - 020 1. Calculated based on the formula PD = Rating 1 Package Peak Temperature 260 Unit C
TJ - TC RJC 2. MTTF calculator available at http://www.freescale.com/rf. Select Software & Tools/Development Tools/Calculators to access MTTF calculators by product.
NOTE - CAUTION - MOS devices are susceptible to damage from electrostatic charge. Reasonable precautions in handling and packaging MOS devices should be observed.
(c) Freescale Semiconductor, Inc., 2008. All rights reserved.
MRF1513NT1 1
RF Device Data Freescale Semiconductor
Table 4. Electrical Characteristics (TC = 25C unless otherwise noted)
Characteristic Off Characteristics Zero Gate Voltage Drain Current (VDS = 40 Vdc, VGS = 0 Vdc) Gate- Source Leakage Current (VGS = 10 Vdc, VDS = 0 Vdc) On Characteristics Gate Threshold Voltage (VDS = 12.5 Vdc, ID = 60 A) Drain- Source On - Voltage (VGS = 10 Vdc, ID = 500 mAdc) Dynamic Characteristics Input Capacitance (VDS = 12.5 Vdc, VGS = 0, f = 1 MHz) Output Capacitance (VDS = 12.5 Vdc, VGS = 0, f = 1 MHz) Reverse Transfer Capacitance (VDS = 12.5 Vdc, VGS = 0, f = 1 MHz) Functional Tests (In Freescale Test Fixture) Common- Source Amplifier Power Gain (VDD = 12.5 Vdc, Pout = 3 Watts, IDQ = 50 mA, f = 520 MHz) Drain Efficiency (VDD = 12.5 Vdc, Pout = 3 Watts, IDQ = 50 mA, f = 520 MHz) Gps -- -- 15 65 -- -- dB % Ciss Coss Crss -- -- -- 33 16.5 2.2 -- -- -- pF pF pF VGS(th) VDS(on) 1 -- 1.7 0.65 2.1 -- Vdc Vdc IDSS IGSS -- -- -- -- 1 1 Adc Adc Symbol Min Typ Max Unit
MRF1513NT1 2 RF Device Data Freescale Semiconductor
VGG C9 C8
B2 + C7 R4 B1 R3 C17 C16 C15 + VDD C14
L1 C6 R2 Z7 R1 N1 RF INPUT C1 C2 C3 C4 C5 Z1 Z2 Z3 Z4 Z5 Z6 DUT C10 C11 C12 C13 Z8 Z9 Z10 Z11 N2 RF OUTPUT
B1, B2 C1, C13 C2, C3, C4, C10, C11, C12 C5, C6, C17 C7, C14 C8, C15 C9, C16 L1 N1, N2 R1, R3 R2
Short Ferrite Beads, Fair Rite Products #2743021446 240 pF, 100 mil Chip Capacitors 0 to 20 pF Trimmer Capacitors 120 pF, 100 mil Chip Capacitors 10 mF, 50 V Electrolytic Capacitors 1,200 pF, 100 mil Chip Capacitors 0.1 mF, 100 mil Chip Capacitors 55.5 nH, 5 Turn, Coilcraft Type N Flange Mounts 15 Chip Resistors (0805) 1 k, 1/8 W Resistor
R4 Z1 Z2 Z3 Z4 Z5 Z6, Z7 Z8 Z9 Z10 Z11 Board
33 k, 1/8 W Resistor 0.236 x 0.080 Microstrip 0.981 x 0.080 Microstrip 0.240 x 0.080 Microstrip 0.098 x 0.080 Microstrip 0.192 x 0.080 Microstrip 0.260 x 0.223 Microstrip 0.705 x 0.080 Microstrip 0.342 x 0.080 Microstrip 0.347 x 0.080 Microstrip 0.846 x 0.080 Microstrip Glass Teflon(R), 31 mils, 2 oz. Copper
Figure 1. 450 - 520 MHz Broadband Test Circuit
TYPICAL CHARACTERISTICS, 450 - 520 MHz
5 470 MHz Pout , OUTPUT POWER (WATTS) 4 520 MHz 3 450 MHz 500 MHz IRL, INPUT RETURN LOSS (dB) -5 0 VDD = 12.5 Vdc
-10
500 MHz 470 MHz
2
1 VDD = 12.5 Vdc 0 0 0.05 0.10 0.15 Pin, INPUT POWER (WATTS) 0.20
-15 520 MHz -20 0 1 450 MHz 2 3 Pout, OUTPUT POWER (WATTS) 4 5
Figure 2. Output Power versus Input Power
Figure 3. Input Return Loss versus Output Power
MRF1513NT1 RF Device Data Freescale Semiconductor 3
TYPICAL CHARACTERISTICS, 450 - 520 MHz
16 15 14 GAIN (dB) 13 12 11 VDD = 12.5 Vdc 10 0 1 2 3 Pout, OUTPUT POWER (WATTS) 4 5 20 0 1 3 2 Pout, OUTPUT POWER (WATTS) 4 5 70 450 MHz 520 MHz 500 MHz 470 MHz Eff, DRAIN EFFICIENCY (%) 60 450 MHz 50 500 MHz 520 MHz 470 MHz
40
30 VDD = 12.5 Vdc
Figure 4. Gain versus Output Power
Figure 5. Drain Efficiency versus Output Power
6 Pout , OUTPUT POWER (WATTS) 450 MHz 470 MHz 500 MHz 520 MHz
70 65 520 MHz 60 470 MHz 55 50 45 40 600 0 100 300 400 200 IDQ, BIASING CURRENT (mA) 500 600 VDD = 12.5 Vdc Pin = 20.3 dBm 500 MHz 450 MHz
4
3
2 1 0 100 200 300 400 IDQ, BIASING CURRENT (mA) VDD = 12.5 Vdc Pin = 20.3 dBm 500
Figure 6. Output Power versus Biasing Current
Eff, DRAIN EFFICIENCY (%)
5
Figure 7. Drain Efficiency versus Biasing Current
5 Pout , OUTPUT POWER (WATTS)
80 70 60 450 MHz 50 40 30 20 8 9 10 11 12 13 14 15 16 8 9 10 11 12 13 14 15 16 VDD, SUPPLY VOLTAGE (VOLTS) VDD, SUPPLY VOLTAGE (VOLTS) Pin = 20.3 dBm IDQ = 50 mA 500 MHz 470 MHz 520 MHz
3 450 MHz 520 MHz 2 470 MHz 1 0 500 MHz Pin = 20.3 dBm IDQ = 50 mA
Figure 8. Output Power versus Supply Voltage
Eff, DRAIN EFFICIENCY (%)
4
Figure 9. Drain Efficiency versus Supply Voltage
MRF1513NT1 4 RF Device Data Freescale Semiconductor
VGG C9 C8
B2 + C7 R4 B1 R3 C16 C15 C14 + VDD C13
L1 C6 R2 Z7 R1 N1 RF INPUT C1 C2 C3 C4 C5 Z1 Z2 Z3 Z4 Z5 Z6 DUT C10 C11 C12 Z8 Z9 Z10 N2 RF OUTPUT
B1, B2 C1, C12 C2, C3, C4, C10, C11 C5, C6, C16 C7, C13 C8, C14 C9, C15 L1 N1, N2 R1 R2
Short Ferrite Bead, Fair Rite Products #2743021446 330 pF, 100 mil Chip Capacitors 1 to 20 pF Trimmer Capacitors 120 pF, 100 mil Chip Capacitors 10 F, 50 V Electrolytic Capacitors 1,200 pF, 100 mil Chip Capacitors 0.1 mF, 100 mil Chip Capacitors 55.5 nH, 5 Turn, Coilcraft Type N Flange Mounts 15 Chip Resistor (0805) 1 k, 1/8 W Resistor
R3 R4 Z1 Z2 Z3 Z4 Z5 Z6, Z7 Z8 Z9 Z10 Board
15 Chip Resistor (0805) 33 k, 1/8 W Resistor 0.253 x 0.080 Microstrip 0.958 x 0.080 Microstrip 0.247 x 0.080 Microstrip 0.193 x 0.080 Microstrip 0.132 x 0.080 Microstrip 0.260 x 0.223 Microstrip 0.494 x 0.080 Microstrip 0.941 x 0.080 Microstrip 0.452 x 0.080 Microstrip Glass Teflon(R), 31 mils, 2 oz. Copper
Figure 10. 400 - 470 MHz Broadband Test Circuit
TYPICAL CHARACTERISTICS, 400 - 470 MHz
5 400 MHz Pout , OUTPUT POWER (WATTS) 4 470 MHz 3 IRL, INPUT RETURN LOSS (dB) 440 MHz VDD = 12.5 Vdc -5 0
-10
440 MHz 400 MHz
2
1 VDD = 12.5 Vdc 0 0 0.02 0.04 0.06 0.08 Pin, INPUT POWER (WATTS) 0.10 0.12
-15 470 MHz -20 0 1 3 2 Pout, OUTPUT POWER (WATTS) 4 5
Figure 11. Output Power versus Input Power
Figure 12. Input Return Loss versus Output Power
MRF1513NT1 RF Device Data Freescale Semiconductor 5
TYPICAL CHARACTERISTICS, 400 - 470 MHz
18 17 16 GAIN (dB) 15 14 13 VDD = 12.5 Vdc 12 0 1 2 3 Pout, OUTPUT POWER (WATTS) 4 5 0 0 1 3 2 Pout, OUTPUT POWER (WATTS) 4 5 470 MHz Eff, DRAIN EFFICIENCY (%) 400 MHz 440 MHz 70 470 MHz 60 50 440 MHz 40 30 20 VDD = 12.5 Vdc 10 400 MHz
Figure 13. Gain versus Output Power
Figure 14. Drain Efficiency versus Output Power
6 400 MHz Pout , OUTPUT POWER (WATTS) Eff, DRAIN EFFICIENCY (%) 5 440 MHz 4 470 MHz 3 VDD = 12.5 Vdc Pin = 18.7 dBm
70 65 470 MHz 60 440 MHz 55 50 45 40 0 100 200 300 400 IDQ, BIASING CURRENT (mA) 500 600 0 100 400 200 300 IDQ, BIASING CURRENT (mA) 500 600 400 MHz VDD = 12.5 Vdc Pin = 18.7 dBm
2 1
Figure 15. Output Power versus Biasing Current
Figure 16. Drain Efficiency versus Biasing Current
5 Pout , OUTPUT POWER (WATTS) 400 MHz 440 MHz 470 MHz 3
80 70 60 50 40 30 20 8 9 10 11 12 13 14 15 16 8 9 10 11 12 13 14 15 16 VDD, SUPPLY VOLTAGE (VOLTS) VDD, SUPPLY VOLTAGE (VOLTS) Pin = 18.7 dBm IDQ = 50 mA
Eff, DRAIN EFFICIENCY (%)
4
470 MHz 440 MHz 400 MHz
2 Pin = 18.7 dBm IDQ = 50 mA
1 0
Figure 17. Output Power versus Supply Voltage
Figure 18. Drain Efficiency versus Supply Voltage
MRF1513NT1 6 RF Device Data Freescale Semiconductor
VGG C9 C8
B2 + C7 R4 B1 R3 C17 C16 C15 + VDD C14
L4 C6 R2 Z6 RF INPUT N1 C1 C2 R1 Z1 L1 Z2 Z3 C4 C5 Z4 Z5 DUT C10 C3 C11 C12 N2 Z7 L2 Z8 L3 Z9 RF OUTPUT Z10 C13
B1, B2 C1, C13 C2, C4, C10, C12 C3 C5 C6, C17 C7, C14 C8, C15 C9, C16 C11 L1 L2 L3
Short Ferrite Beads, Fair Rite Products #2743021446 330 pF, 100 mil Chip Capacitors 0 to 20 pF Trimmer Capacitors 12 pF, 100 mil Chip Capacitor 130 pF, 100 mil Chip Capacitor 120 pF, 100 mil Chip Capacitors 10 F, 50 V Electrolytic Capacitors 1,000 pF, 100 mil Chip Capacitors 0.1 F, 100 mil Chip Capacitors 18 pF, 100 mil Chip Capacitor 26 nH, 4 Turn, Coilcraft 8 nH, 3 Turn, Coilcraft 55.5 nH, 5 Turn, Coilcraft
L4 N1, N2 R1 R2 R3 R4 Z1 Z2 Z3 Z4 Z5, Z6 Z7 Z8 Z9 Z10 Board
33 nH, 5 Turn, Coilcraft Type N Flange Mounts 15 W Chip Resistor (0805) 56 W, 1/8 W Chip Resistor 10 W, 1/8 W Chip Resistor 33 kW, 1/8 W Chip Resistor 0.115 x 0.080 Microstrip 0.230 x 0.080 Microstrip 1.034 x 0.080 Microstrip 0.202 x 0.080 Microstrip 0.260 x 0.223 Microstrip 1.088 x 0.080 Microstrip 0.149 x 0.080 Microstrip 0.171 x 0.080 Microstrip 0.095 x 0.080 Microstrip Glass Teflon(R), 31 mils, 2 oz. Copper
Figure 19. 135 - 175 MHz Broadband Test Circuit
TYPICAL CHARACTERISTICS, 135 - 175 MHz
5 Pout , OUTPUT POWER (WATTS) 0
4
155 MHz 135 MHz
IRL, INPUT RETURN LOSS (dB)
175 MHz
-5
3
-10
135 MHz 155 MHz 175 MHz
2
1 VDD = 12.5 Vdc 0 0 0.05 0.10 0.15 Pin, INPUT POWER (WATTS) 0.20
-15 VDD = 12.5 Vdc -20 0 1 2 3 Pout, OUTPUT POWER (WATTS) 4 5
Figure 20. Output Power versus Input Power
Figure 21. Input Return Loss versus Output Power
MRF1513NT1 RF Device Data Freescale Semiconductor 7
TYPICAL CHARACTERISTICS, 135 - 175 MHz
18 135 MHz 17 16 GAIN (dB) 15 14 13 VDD = 12.5 Vdc 12 0 1 2 3 Pout, OUTPUT POWER (WATTS) 4 5 0 0 1 3 2 Pout, OUTPUT POWER (WATTS) 4 5 155 MHz Eff, DRAIN EFFICIENCY (%) 175 MHz 60 50 175 MHz 40 30 20 VDD = 12.5 Vdc 10 155 MHz 70 135 MHz
Figure 22. Gain versus Output Power
Figure 23. Drain Efficiency versus Output Power
6 Pout , OUTPUT POWER (WATTS)
80 75 175 MHz 70 65 135 MHz 60 55 50 0 100 200 300 400 IDQ, BIASING CURRENT (mA) 500 600 0 100 200 300 400 IDQ, BIASING CURRENT (mA) 500 600 VDD = 12.5 Vdc Pin = 19.5 dBm 155 MHz
5 155 MHz 4 135 MHz 3 VDD = 12.5 Vdc Pin = 19.5 dBm 2
Figure 24. Output Power versus Biasing Current
Eff, DRAIN EFFICIENCY (%)
175 MHz
Figure 25. Drain Efficiency versus Biasing Current
5 Pout , OUTPUT POWER (WATTS)
80 70 135 MHz 60 155 MHz 50 40 30 20 8 9 10 11 12 13 14 15 16 8 9 10 11 12 13 14 15 16 VDD, SUPPLY VOLTAGE (VOLTS) VDD, SUPPLY VOLTAGE (VOLTS) Pin = 19.5 dBm IDQ = 50 mA 175 MHz
3 175 MHz 2 135 MHz 1 0 Pin = 19.5 dBm IDQ = 50 mA 155 MHz
Figure 26. Output Power versus Supply Voltage
Eff, DRAIN EFFICIENCY (%)
4
Figure 27. Drain Efficiency versus Supply Voltage
MRF1513NT1 8 RF Device Data Freescale Semiconductor
TYPICAL CHARACTERISTICS
108 MTTF FACTOR (HOURS X AMPS2)
107
106 90 100
110 120 130 140 150 160 170 180 190 200 210 TJ, JUNCTION TEMPERATURE (C)
This above graph displays calculated MTTF in hours x ampere2 drain current. Life tests at elevated temperatures have correlated to better than 10% of the theoretical prediction for metal failure. Divide MTTF factor by ID2 for MTTF in a particular application.
Figure 28. MTTF Factor versus Junction Temperature
MRF1513NT1 RF Device Data Freescale Semiconductor 9
Zin 450 f = 520 MHz f = 520 MHz Zo = 10 450 ZOL*
470
Zin ZOL* 470
f = 400 MHz 135
Zin ZOL* 135 f = 175 MHz f = 175 MHz
Zo = 10
f = 400 MHz
VDD = 12.5 V, IDQ = 50 mA, Pout = 3 W f MHz 450 470 500 520 Zin Zin 4.64 +j5.82 5.42 +j6.34 5.96 +j5.45 4.28 +j4.94 ZOL* 13.11 +j2.15 12.16 +j3.26 11.03 +j5.42 10.99 +j7.18 Zin
VDD = 12.5 V, IDQ = 50 mA, Pout = 3 W f MHz 400 440 470 Zin 4.72 +j4.38 4.88 +j6.34 3.22 +j5.24 ZOL* 12.57 +j1.88 11.21 +j5.87 9.82 +j8.63
VDD = 12.5 V, IDQ = 50 mA, Pout = 3 W f MHz 135 155 175 Zin ZOL*
16.55 +j1.82 22.01 +j10.32 15.59 +j5.38 15.55 +j9.43 22.03 +j8.07 22.08 +j6.85
= Complex conjugate of source impedance with parallel 15 resistor and 120 pF capacitor in series with gate. (See Figure 1).
= Complex conjugate of source impedance with parallel 15 resistor and 130 pF capacitor in series with gate. (See Figure 10).
Zin
= Complex conjugate of source impedance with parallel 15 resistor and 130 pF capacitor in series with gate. (See Figure 19).
ZOL* = Complex conjugate of the load impedance at given output power, voltage, frequency, and D > 50 %.
ZOL* = Complex conjugate of the load impedance at given output power, voltage, frequency, and D > 50 %.
ZOL* = Complex conjugate of the load impedance at given output power, voltage, frequency, and D > 50 %.
Note: ZOL* was chosen based on tradeoffs between gain, drain efficiency, and device stability.
Input Matching Network
Device Under Test
Output Matching Network
Z
in
Z
* OL
Figure 29. Series Equivalent Input and Output Impedance
MRF1513NT1 10 RF Device Data Freescale Semiconductor
Table 5. Common Source Scattering Parameters (VDD = 12.5 Vdc) IDQ = 50 mA
f MHz 50 100 200 300 400 500 600 700 800 900 1000 S11 |S11| 0.93 0.81 0.76 0.76 0.77 0.79 0.80 0.81 0.82 0.83 0.84 - 94 - 131 - 153 - 160 - 164 - 167 - 169 - 171 - 172 - 173 - 175 |S21| 22.09 12.78 6.31 3.92 2.74 1.99 1.55 1.25 1.02 0.85 0.70 S21 125 101 81 69 60 54 48 44 38 35 29 |S12| 0.044 0.052 0.047 0.044 0.040 0.036 0.034 0.028 0.027 0.017 0.018 S12 33 6 - 10 - 19 - 26 - 31 - 37 - 40 - 42 - 42 - 49 |S22| 0.77 0.61 0.59 0.64 0.70 0.75 0.80 0.82 0.86 0.88 0.91 S22 - 81 - 115 - 135 - 142 - 147 - 151 - 155 - 158 - 161 - 163 - 166
IDQ = 500 mA
f MHz 50 100 200 300 400 500 600 700 800 900 1000 S11 |S11| 0.84 0.80 0.78 0.78 0.78 0.78 0.79 0.79 0.80 0.81 0.82 - 127 - 152 - 166 - 171 - 173 - 175 - 176 - 177 - 178 - 178 - 179 |S21| 32.57 17.23 8.62 5.58 4.08 3.14 2.55 2.14 1.80 1.54 1.31 S21 112 97 85 79 72 68 63 60 54 51 46 |S12| 0.025 0.025 0.025 0.023 0.022 0.020 0.022 0.019 0.018 0.015 0.012 S12 17 13 -9 -9 -9 - 10 - 15 - 20 - 31 - 25 - 36 |S22| 0.64 0.64 0.65 0.67 0.69 0.71 0.74 0.76 0.79 0.80 0.81 S22 - 130 - 153 - 163 - 166 - 166 - 167 - 168 - 168 - 170 - 170 - 172
IDQ = 1 A
f MHz 50 100 200 300 400 500 600 700 800 900 1000 S11 |S11| 0.84 0.80 0.78 0.77 0.77 0.78 0.78 0.78 0.79 0.80 0.80 - 129 - 153 - 167 - 172 - 174 - 175 - 177 - 177 - 178 - 178 - 179 |S21| 32.57 17.04 8.52 5.53 4.06 3.13 2.54 2.13 1.81 1.54 1.30 S21 111 97 85 79 73 69 64 60 55 51 46 |S12| 0.023 0.024 0.023 0.020 0.020 0.021 0.017 0.017 0.015 0.013 0.011 S12 24 13 5 -7 - 11 -9 - 26 - 14 - 23 - 31 - 17 |S22| 0.61 0.64 0.65 0.67 0.69 0.72 0.74 0.75 0.78 0.79 0.80 S22 - 137 - 156 - 165 - 167 - 167 - 167 - 168 - 168 - 170 - 170 - 172
MRF1513NT1 RF Device Data Freescale Semiconductor 11
APPLICATIONS INFORMATION
DESIGN CONSIDERATIONS This device is a common - source, RF power, N - Channel enhancement mode, Lateral Metal - Oxide Semiconductor Field - Effect Transistor (MOSFET). Freescale Application Note AN211A, "FETs in Theory and Practice", is suggested reading for those not familiar with the construction and characteristics of FETs. This surface mount packaged device was designed primarily for VHF and UHF portable power amplifier applications. Manufacturability is improved by utilizing the tape and reel capability for fully automated pick and placement of parts. However, care should be taken in the design process to insure proper heat sinking of the device. The major advantages of Lateral RF power MOSFETs include high gain, simple bias systems, relative immunity from thermal runaway, and the ability to withstand severely mismatched loads without suffering damage. MOSFET CAPACITANCES The physical structure of a MOSFET results in capacitors between all three terminals. The metal oxide gate structure determines the capacitors from gate - to - drain (Cgd), and gate - to - source (Cgs). The PN junction formed during fabrication of the RF MOSFET results in a junction capacitance from drain - to - source (Cds). These capacitances are characterized as input (Ciss), output (Coss) and reverse transfer (Crss) capacitances on data sheets. The relationships between the inter - terminal capacitances and those given on data sheets are shown below. The Ciss can be specified in two ways: 1. Drain shorted to source and positive voltage at the gate. 2. Positive voltage of the drain in respect to source and zero volts at the gate. In the latter case, the numbers are lower. However, neither method represents the actual operating conditions in RF applications. drain - source voltage under these conditions is termed VDS(on). For MOSFETs, VDS(on) has a positive temperature coefficient at high temperatures because it contributes to the power dissipation within the device. BVDSS values for this device are higher than normally required for typical applications. Measurement of BVDSS is not recommended and may result in possible damage to the device. GATE CHARACTERISTICS The gate of the RF MOSFET is a polysilicon material, and is electrically isolated from the source by a layer of oxide. The DC input resistance is very high - on the order of 109 -- resulting in a leakage current of a few nanoamperes. Gate control is achieved by applying a positive voltage to the gate greater than the gate - to - source threshold voltage, VGS(th). Gate Voltage Rating -- Never exceed the gate voltage rating. Exceeding the rated VGS can result in permanent damage to the oxide layer in the gate region. Gate Termination -- The gates of these devices are essentially capacitors. Circuits that leave the gate open - circuited or floating should be avoided. These conditions can result in turn - on of the devices due to voltage build - up on the input capacitor due to leakage currents or pickup. Gate Protection -- These devices do not have an internal monolithic zener diode from gate - to - source. If gate protection is required, an external zener diode is recommended. Using a resistor to keep the gate - to - source impedance low also helps dampen transients and serves another important function. Voltage transients on the drain can be coupled to the gate through the parasitic gate - drain capacitance. If the gate - to - source impedance and the rate of voltage change on the drain are both high, then the signal coupled to the gate may be large enough to exceed the gate - threshold voltage and turn the device on. DC BIAS Since this device is an enhancement mode FET, drain current flows only when the gate is at a higher potential than the source. RF power FETs operate optimally with a quiescent drain current (IDQ), whose value is application dependent. This device was characterized at IDQ = 50 mA, which is the suggested value of bias current for typical applications. For special applications such as linear amplification, IDQ may have to be selected to optimize the critical parameters. The gate is a dc open circuit and draws no current. Therefore, the gate bias circuit may generally be just a simple resistive divider network. Some special applications may require a more elaborate bias system. GAIN CONTROL Power output of this device may be controlled to some degree with a low power dc control signal applied to the gate, thus facilitating applications such as manual gain control, ALC/AGC and modulation systems. This characteristic is very dependent on frequency and load line.
Drain Cgd Gate Cds Cgs Source Ciss = Cgd + Cgs Coss = Cgd + Cds Crss = Cgd
DRAIN CHARACTERISTICS One critical figure of merit for a FET is its static resistance in the full - on condition. This on - resistance, RDS(on), occurs in the linear region of the output characteristic and is specified at a specific gate - source voltage and drain current. The
MRF1513NT1 12 RF Device Data Freescale Semiconductor
MOUNTING The specified maximum thermal resistance of 4C/W assumes a majority of the 0.065 x 0.180 source contact on the back side of the package is in good contact with an appropriate heat sink. As with all RF power devices, the goal of the thermal design should be to minimize the temperature at the back side of the package. Refer to Freescale Application Note AN4005/D, "Thermal Management and Mounting Method for the PLD - 1.5 RF Power Surface Mount Package" for additional information. AMPLIFIER DESIGN Impedance matching networks similar to those used with bipolar transistors are suitable for this device. For examples see Freescale Application Note AN721, "Impedance Matching Networks Applied to RF Power Transistors." Large - signal impedances are provided, and will yield a good
first pass approximation. Since RF power MOSFETs are triode devices, they are not unilateral. This coupled with the very high gain of this device yields a device capable of self oscillation. Stability may be achieved by techniques such as drain loading, input shunt resistive loading, or output to input feedback. The RF test fixture implements a parallel resistor and capacitor in series with the gate, and has a load line selected for a higher efficiency, lower gain, and more stable operating region. Two - port stability analysis with this device's S - parameters provides a useful tool for selection of loading or feedback circuitry to assure stable operation. See Freescale Application Note AN215A, "RF Small - Signal Design Using Two - Port Parameters" for a discussion of two port network theory and stability.
MRF1513NT1 RF Device Data Freescale Semiconductor 13
PACKAGE DIMENSIONS
A F
3
0.146 3.71
0.095 2.41
0.115 2.92
B
D
1
2
R
L
0.115 2.92 0.020 0.51
4
N K Q
ZONE V
0.35 (0.89) X 45_" 5 _ 10_DRAFT
inches mm
SOLDER FOOTPRINT
DIM A B C D E F G H J K L N P Q R S U ZONE V ZONE W ZONE X INCHES MIN MAX 0.255 0.265 0.225 0.235 0.065 0.072 0.130 0.150 0.021 0.026 0.026 0.044 0.050 0.070 0.045 0.063 0.160 0.180 0.273 0.285 0.245 0.255 0.230 0.240 0.000 0.008 0.055 0.063 0.200 0.210 0.006 0.012 0.006 0.012 0.000 0.021 0.000 0.010 0.000 0.010 MILLIMETERS MIN MAX 6.48 6.73 5.72 5.97 1.65 1.83 3.30 3.81 0.53 0.66 0.66 1.12 1.27 1.78 1.14 1.60 4.06 4.57 6.93 7.24 6.22 6.48 5.84 6.10 0.00 0.20 1.40 1.60 5.08 5.33 0.15 0.31 0.15 0.31 0.00 0.53 0.00 0.25 0.00 0.25
U H
4
P C
Y
Y
E
ZONE W
1
G
MRF1513NT1 14 RF Device Data Freescale Semiconductor
EEE E E EEEEEE EEEE E EEEEEE EE EEEEEE EE EEEEEE EE
2 3
NOTES: 1. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1984. 2. CONTROLLING DIMENSION: INCH 3. RESIN BLEED/FLASH ALLOWABLE IN ZONE V, W, AND X. STYLE 1: PIN 1. 2. 3. 4. DRAIN GATE SOURCE SOURCE
S
ZONE X
VIEW Y - Y
CASE 466 - 03 ISSUE D PLD - 1.5 PLASTIC
PRODUCT DOCUMENTATION
Refer to the following documents to aid your design process. Application Notes * AN211A: Field Effect Transistors in Theory and Practice * AN215A: RF Small - Signal Design Using Two - Port Parameters * AN721: Impedance Matching Networks Applied to RF Power Transistors * AN4005: Thermal Management and Mounting Method for the PLD 1.5 RF Power Surface Mount Package Engineering Bulletins * EB212: Using Data Sheet Impedances for RF LDMOS Devices
REVISION HISTORY
The following table summarizes revisions to this document.
Revision 10 11 Date Feb. 2008 June 2008 Description * Changed DC Bias IDQ value from 150 to 50 to match Functional Test IDQ specification, p. 12 * Added Product Documentation and Revision History, p. 15 * Corrected specified performance values for power gain and efficiency on p. 1 to match typical performance values in the functional test table on p. 2
MRF1513NT1 RF Device Data Freescale Semiconductor 15
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MRF1513NT1
Rev. 16 11, 6/2008 Document Number: MRF1513N
RF Device Data Freescale Semiconductor


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